1. Field of the Invention
The present invention relates to a constant voltage outputting circuit for stabilizing an output from the power supply when a power supply voltage changes.
2. Description of the Related Art
FIG. 4 is an example of a conventional constant voltage outputting circuit.
An output terminal 411 of a differential amplification circuit 401 having an input terminal connected to a reference voltage VREF is connected to a gate of a PMOS transistor 431 serving as an output transistor. A source terminal of the PMOS transistor 431 is connected to a power supply voltage VDD, and a drain terminal of the PMOS transistor 431 is connected to an output terminal VOUT. One terminal of a resistor 441 is connected to the output terminal VOUT, and the other terminal of the resistor 441 is connected to the other input terminal of the differential amplification circuit 401 and one terminal of a resistor 442, respectively. The other terminal of the resistor 442 is connected to a grounding electric potential VSS.
In the constant voltage outputting circuit constructed as shown in FIG. 4, when an electric potential at a node 422 is lower than the reference voltage VREF, an electric potential at an output terminal 411 of the differential amplification circuit 401 drops, a gate-to-source voltage of the PMOS transistor 431 increases, and hence an output current of the circuit increases. As a result, an electric potential at the output terminal VOUT and an electric potential at the node 422 increase, respectively. On the other hand, when the electric potential at the node 422 is higher than the reference voltage VREF, the electric potential at the output terminal 411 of the differential amplification circuit 401 increases, the gate-to-source voltage of the PMOS transistor 431 decreases, and hence the output current of the circuit decreases. As a result, the electric potential at the output terminal VOUT and the electric potential at the node 422 drop together. Based on this mechanism, the electric potential at the node 422 is stabilized at the same level as that of the electric potential of the reference voltage VREF, and the electric potential at the output terminal VOUT becomes constant in accordance with a resistance value ratio of the resistor 441 to the resistor 442.
When the power supply voltage VDD increases from this stable state, the gate-to-source voltage of the PMOS transistor 431 temporarily increases, the current increases, and hence the electric potential at the output terminal VOUT increases. After that, the electric potential at the node 422 is stabilized at the same level as that of the reference voltage VREF based on the mechanism.
Conversely, when the power supply voltage VDD drops, the gate-to-source voltage of the PMOS transistor 431 temporarily decreases, the current decreases, and hence the electric potential at the output terminal VOUT drops. After that, the electric potential at the node 422 is stabilized at the same level as that of the reference voltage VREF by means of the mechanism.
As means for stabilizing the output from the circuit when the power supply voltage changes in such a constant voltage outputting circuit, there is known a method using means disclosed in JP5-40535A (FIG. 1), for example. However, this method involves a problem in that the number of elements increases.
The problem inherent in the related art will hereinafter be described with reference to FIG. 5. In the conventional constant voltage outputting circuit, when the power supply voltage VDD changes at a point A of FIG. 5, the electric potential at the output terminal 411 of the differential amplification circuit 401, as shown by a dotted line, is stable as it is for a certain time until a point B. Hence, the gate-to-source voltage of the PMOS transistor 431 changes, and thus the current caused to flow through the PMOS transistor 431 changes. As a result, the output voltage at the output terminal VOUT temporarily changes as shown by a dotted line. In the constant voltage outputting circuit, the change of the output voltage value is desirably small, and it is a problem to suppress the change without increasing the number of elements.